An Evaluation of Code Generation Strategies Targeting Hardware for the Rapid Prototyping of SDL-Specifications

The specification of an embedded system at system level together with co–joint hardware/software synthesis is a goal of many rapid prototyping projects. SDL has been proposed as a formal and abstract specification language well suited for this purpose. In the automated generation of hardware however, SDL’s asynchronous communication model (directly implemented in the so called server model) can lead to a large overhead in area and response time. The activity thread implementation model on the other hand is more similar to hardware description language concepts, respectively an execution in hardware, due to its synchronous communication and execution scheme. This paper compares VHDL code generation from SDL using these two models regarding implementation architectures, resource usage, throughput and response time. The integration in an existing rapid prototyping design process is presented as well as results gained form several application examples.